Next-Generation
Integrated Circuit and System Design Lab.
Electronics and Information Engineering, Korea University
1998 ~ 2002 SNU, Electrical and Computer Engineering (BS)
2002 ~ 2004 SNU, Electrical and Computer Engineering (MS)
2005 ~ 2009 Harvard University, Electrical Engineering (PhD)
2009 ~ 2011 Keio University, Electrical Engineering (Research
professor)
2012 ~ 2013 KAIST, Electrical Engineering (Post-doc)
2014 ~ Korea University, Electronics and Imformation Engineering (Assistant professor)
Hayun Chung
RESEARCH INTEREST
High-speed mixed-signal CMOS circuits and digitally assisted analog circuits.
- Variability-aware designs for CMOS high-speed I/O interface circuits
- Low-power, high-speed, reconfigurable analog circuits assisted by digital backend
- High-level modeling and optimization of analog/digital circuits
- High-efficiency inductive-coupling power transceiver circuits/systems
EDUCATION
Harvard University Cambridge, MA
Ph.D. in Engineering Sciences, Nov. 2009.
Thesis: Design Considerations for High-Speed Backplane Transceivers with Digital Adaptive Equalizers
Advisor: Prof. Gu-Yeon Wei
Seoul National University Seoul, Korea
Master of Science in Electrical Engineering, Feb. 2004.
Thesis: Design of a 128-phase PLL using interpolation technique for Gigabit Ethernet LSI
Advisors: Prof. Wonchan Kim and Prof. Deog-Kyoon Jeong
Seoul National University Seoul, Korea
Bachelor of Science in Electrical Engineering, Feb. 2002
AWARDS
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Excellent Teaching Award, Korea University, Spring 2014
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Harvard Graduate School of Art and Sciences Fellowship, Harvard University, 2005-2006.
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IEEE SSCS/EDS Seoul Chapter English Paper Award, Nov. 2003.
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School of Electrical Engineering Fellowship, Seoul National University, 2002.